MODULE lcd_logic

title 'ui interface board';

" chip specific
PLSI PROPERTY 'PULLUP ON';
PLSI PROPERTY 'CLK isa_clk CLK0';
PLSI PROPERTY 'ISP OFF';
PLSI PROPERTY 'Y1_AS_RESET ON';

lcd_hd_en		pin	istype 'reg';
lcd_wait		pin	istype 'reg';
lcd_sta, lcd_stb	node	istype 'reg';
!lcd_tosh_cs		pin	istype 'com';

isa_adr9..isa_adr0	pin;

!isa_ior		pin;
!isa_iow		pin;

!RESET			pin 	35;

isa_clk			pin	11;
isa_aen			pin;

isa_irq			pin	istype 'reg';

"isr_enc			pin	istype 'reg';
isr_p0			pin	istype 'reg';
isr_p90			pin	istype 'reg';
isr_t0			pin	istype 'reg';
isr_t1			pin	istype 'reg';
isr_t2			pin	istype 'reg';
isr_t3			pin	istype 'reg';
isr_ir			pin	istype 'reg';

n_p0			node	istype 'reg';
n_p90			node	istype 'reg';
n_t0			node	istype 'reg';
n_t1			node	istype 'reg';
n_t2			node	istype 'reg';
n_t3			node	istype 'reg';
n_ir			node	istype 'reg';

infrared		pin;
enc_p0			pin;
enc_p90			pin;
t0			pin;
t1			pin;
t2			pin;
t3			pin;

backlight0		pin	istype 'reg';
backlight1		pin	istype 'reg';

"!xreg_rd		pin	istype 'com';
"!xreg_wr		pin	istype 'com';

doe			pin	istype 'com';
"doe			pin	istype 'reg';

"--------------------------------------------------------------------
" definitions

declarations

lcd_sreg	= [lcd_hd_en, lcd_wait, lcd_sta, lcd_stb];

"State Values...
"		  en wait a  b
LCD_IDLE	= [ 0, 0, 0, 0];	" 4
LCD_WS3		= [ 0, 1, 0, 0];	" 0
LCD_WS2		= [ 1, 1, 0, 1];	" 9
LCD_WS1		= [ 1, 1, 1, 1];	" 11
LCD_WS0		= [ 1, 1, 1, 0];	" 10
LCD_PRE0	= [ 1, 0, 1, 0];	" 14
LCD_PRE1	= [ 0, 0, 1, 0];	" 6
LCD_PRE2	= [ 0, 0, 1, 1];	" 7
LCD_AP0		= [ 0, 1, 1, 0];	" 2
LCD_AP1		= [ 0, 1, 1, 1];	" 3

isa_adr 	= [isa_adr9..isa_adr0];

" the basic io-board selection
" select 0x300 to 0x31f
IO_PROTO_SEL	= ( !isa_aen & isa_adr[9..5] == [ 1,1,0,0,0]);

" select 0x302 to 0x305
LCD_HD_SEL 	= ( !isa_aen & IO_PROTO_SEL & ((isa_adr[ 4..1] == [ 0,0,1,0]) # (isa_adr[ 4..1] == [ 0,0,0,1])) & ( isa_ior # isa_iow));

"select 0x306 to 0x307
LCD_TOSH_SEL 	= ( !isa_aen & IO_PROTO_SEL & (isa_adr[4..1] == [ 0,0,1,1]) & ( isa_ior # isa_iow));

LCD_SEL		= ( !isa_aen & IO_PROTO_SEL & (isa_adr[4..3] == [ 0,0]) & ( isa_ior # isa_iow));

" the registers

"isr at 0x308
ISR_SEL 	= ( !isa_aen & IO_PROTO_SEL & (isa_adr[4..0] == [ 0,1,0,0,0]));

"backlight at 0x300
BL_SEL 		= ( !isa_aen & IO_PROTO_SEL & (isa_adr[4..0] == [ 0,0,0,0,0]));


"--------------------------------------------------------------------
" combinatorial

equations

" data buffers enabled

doe		= !( IO_PROTO_SEL & ( isa_ior # isa_iow));
"doe.clk		= isa_clk;

"xreg_rd		= EXT_SEL & isa_ior;
"xreg_wr		= EXT_SEL & isa_iow;

" lcd controllers
[lcd_hd_en, lcd_wait, lcd_sta, lcd_stb].clk = isa_clk;
[lcd_hd_en, lcd_wait, lcd_sta, lcd_stb].ACLR = RESET;

lcd_tosh_cs	= LCD_TOSH_SEL;

" general

"---------------------------------------------------
" the encoder

n_p0		= enc_p0;
n_p0.clk	= isa_clk;

isr_p0		= n_p0;
isr_p0.clk	= isa_clk;
isr_p0.OE	= ISR_SEL & isa_ior;

n_p90		= enc_p90;
n_p90.clk	= isa_clk;

isr_p90		= n_p90;
isr_p90.clk	= isa_clk;
isr_p90.OE	= ISR_SEL & isa_ior;

" the buttons

n_t0	 	= !t0;
n_t0.clk	= isa_clk;

isr_t0	 	= n_t0;
isr_t0.clk	= isa_clk;
isr_t0.OE	= ISR_SEL & isa_ior;

n_t1	 	= !t1;
n_t1.clk	= isa_clk;

isr_t1 		= n_t1;
isr_t1.clk	= isa_clk;
isr_t1.OE	= ISR_SEL & isa_ior;

n_t2	 	= !t2;
n_t2.clk	= isa_clk;

isr_t2 		= n_t2;
isr_t2.clk	= isa_clk;
isr_t2.OE	= ISR_SEL & isa_ior;

n_t3	 	= !t3;
n_t3.clk	= isa_clk;

isr_t3 		= n_t3;
isr_t3.clk	= isa_clk;
isr_t3.OE	= ISR_SEL & isa_ior;

n_ir		= infrared;
n_ir.clk	= isa_clk;

isr_ir	 	= n_ir;
isr_ir.clk	= isa_clk;
isr_ir.OE	= ISR_SEL & isa_ior;
"----------------------------------------------------

" write bits

backlight0	= isr_p0.pin;
backlight0.clk   = !( BL_SEL & isa_iow);

backlight1	= isr_p90.pin;
backlight1.clk   = !( BL_SEL & isa_iow);

" the interrupt

isa_irq 	= (n_t0 $ isr_t0.fb) # (n_t1 $ isr_t1.fb) # (n_t2 $ isr_t2.fb) # (n_t3 $ isr_t3.fb) # (n_p0 $ isr_p0.fb) # (n_p90 $ isr_p90.fb) # (n_ir $ isr_ir.fb) # (isa_irq.fb & !(ISR_SEL & isa_iow));
isa_irq.clk	= isa_clk;
isa_irq.ACLR	= RESET;

"--------------------------------------------------------------------
"state machines

" statemachine for LCD controllers
state_diagram lcd_sreg;

State LCD_IDLE:      " wait for an access
IF ( LCD_HD_SEL) THEN LCD_WS3;
ELSE LCD_IDLE;

State LCD_WS3:	" waitstate, not yet enabled
GOTO LCD_WS2;

State LCD_WS2:	" waitstate, enabled
GOTO LCD_WS1;

State LCD_WS1:	" waitstate, enabled
GOTO LCD_WS0;

State LCD_WS0:	" waitstate, enabled
GOTO LCD_PRE0;

State LCD_PRE0:	" no waitstate, enabled, wait for read
IF ( isa_ior) THEN LCD_PRE0;
ELSE LCD_PRE1;

State LCD_PRE1:	" disable, evtl. queue access
"if ( LCD_HD_SEL) THEN LCD_AP0;
"else 
GOTO LCD_PRE2;

State LCD_PRE2:	" disable, evtl. queue access
if ( LCD_HD_SEL) THEN LCD_AP1;
else LCD_IDLE;

STATE LCD_AP0:	" access queued, disable on more
GOTO LCD_AP1;

STATE LCD_AP1:	" access queued, start new access
GOTO LCD_WS3;

END